sic wafers

Silicon Carbide (SiC) Wafers & Substrates

Epi-ready 4H/6H SiC substrates for power devices, RF/MMIC, and harsh-environment sensing. Tight geometry per SEMI M55, low defect density, and controlled bow/TTV to drive yield and reliability.

Silicon Carbide Wafer Manufacturer

Zirsec supplies high-quality 4H-Silicon Carbide and 6H-Silicon Carbide wafers, available in both conductive and semi-insulating types. Our wafers feature low defect density, excellent thermal performance, and precise doping control, making them ideal for power and RF device applications.

We also provide Silicon Carbide substrates with superior crystal quality and surface finish, supporting epitaxial growth and high-reliability chip production. With full customization and stable supply, Zirsec powers your next-generation semiconductor solutions.

Silicon Carbide Properties | Available Polytypes

 

4H-SiC

6H-SiC

Diameter50mm (2″), 76mm (3″), 100mm (4″), 150mm (6″)50mm (2″) & 100mm (4″)
Type/DopantN/Nitrogen / intrinsic / HPSIN/Nitrogen / intrinsic / HPSI
Resistivity.012 – .028 ohm*cm>.00001 ohm*cm
Thickness250um – 15,000um (15mm)250um – 15,000um (15mm)
Surface FinishSingle or double side polishedSingle or double side polished
Stacking SequenceABCBABCACB
Dielectric Constant9.69.66
Electron Mobility800 cm2/V*S400 cm2/V*S
Density3.21 · 103 kg/m33.21 · 103 kg/m3

SIC Substrate Specification

Square Silicon Carbide Substrate
ModelSpecifications (mm)Thickness (mm)
AT-SIC-CD00110*30.5/1.0
AT-SIC-CD00210*50.5/1.0
AT-SIC-CD00310*100.5/1.0
AT-SIC-CD00415*150.5/1.0
AT-SIC-CD00520*150.5/1.0
AT-SIC-CD00620*200.5/1.0
Round Silicon Carbide Substrate
ModelDiameter(inches)Thickness (mm)
AT-SIC-CD10120.5/1.0
AT-SIC-CD10230.5/1.0
AT-SIC-CD10340.5/1.0
AT-SIC-CD10460.5/1.0
AT-SIC-CD10580.5/1.0

Silicon Carbide Wafer Manufacturing Process

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1. Raw Material Preparation

Silicon is extracted from quartz sand and purified to create metallurgical-grade silicon (MG-Si). Further refining produces electronic-grade silicon (EG-Si) suitable for semiconductor and photovoltaic industries.

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2. Pulling Single Crystal Silicon

Polycrystalline silicon is converted into single crystal silicon using the Czochralski method. The silicon is pulled slowly to form a single crystal silicon rod, typically 30 cm in diameter and 1-1.5 meters in length.

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3. Wafer Cutting

The silicon ingots are cut into thin wafers using diamond-wire saws or inner-circle saws. The cutting process must be carefully controlled to manage temperature, vibration, and use of cutting fluids for cooling and lubrication.

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4. Edge Grinding, Polishing

Cut wafers are polished to a smooth, mirror-like finish, including edge grinding, polishing, and cleaning to remove cutting fluid, debris, and micro-cracks. This results in the final product wafer.

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5. Cleaning

After polishing, the wafer undergoes thorough cleaning to remove any remaining polishing fluids, abrasives, and impurities, ensuring the wafer surface is pristine.

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6. Inspection and Sorting

The polished wafer is inspected using optical microscopes or other equipment to ensure it meets quality standards, including surface flatness, material removal amount, thickness, and surface defects. Wafer batches that pass inspection proceed to the next process; those that fail are reworked or discarded.

Wafer Preparation Process Summary
StepDescription
Raw Material PreparationExtracting and purifying silicon from quartz sand to create high-purity silicon.
Pulling Single Crystal SiliconConverting polycrystalline silicon to single crystal silicon using the Czochralski method.
Wafer CuttingCutting silicon ingots into thin wafers using diamond-wire or inner-circle saws.
Edge Grinding, PolishingPolishing the wafers to a smooth, mirror-like finish and removing defects.
CleaningThorough cleaning of wafers to ensure their surface is free of contaminants.
Inspection and SortingInspecting and sorting wafers to ensure quality and consistency before moving to the next process.

FAQ

1) What diameters and edge styles do you support?
2/3/4″ with flats; 150 mm with notch. 200 mm is vendor/lot dependent and quoted on request.

N-type ~350 μm; SI ~500 μm on 3–4″; 150 mm lots vary by grade.

Prime ≤1 cm⁻², production ≤5 cm⁻², research ≤15 cm⁻², plus dummy grades. Lot maps provided.

It promotes step-flow epitaxy and suppresses polytype inclusions, improving thick epi quality.
4H dominates power devices due to mobility and breakdown advantages; 6H remains in RF/sensor niches and some legacy processes.
Standard SI ≥1×105 Ω·cm, with high-purity lots specified at ≥1×108 Ω·cm on 150 mm.
Yes, via qualified partners. Share layer targets, doping and uniformity specs; we’ll match wafers and epi windows accordingly.
Lot COA with MPD map, TTV/bow/warp, orientation and resistivity binning; additional XRC (FWHM) on request.
Yes. Edge geometry per SEMI M55 with customer-specific fiducials and laser IDs supported.
Multiple suppliers announced 200 mm SiC materials and product rollouts in 2025; lead times and grades are quoted per lot plan.
Single-wafer cassettes or vacuum-sealed clean packs with backside laser ID marking.

Yes. We can include monitor wafers and diced coupons from the same boule/lot for process baselining.

Customization

From design to reverse engineering, we provide free technical consulting to help upgrade your equipment. We specialize in high-precision complex parts with ±0.01mm tolerances and special coatings like acid and oxidation resistance, tailored for demanding industrial applications.

FAQ

Zirsec offers a wide range of SiC components including tubes, beams, plates, crucibles, rollers, sealing rings, and custom mechanical parts for industrial, chemical, and semiconductor applications.

Yes. We support OEM and customized production based on your drawings, specifications, or working conditions.

Yes, sample orders are available for standard items. For custom-made components, small batch samples can be produced after design confirmation.

Simply fill out the contact form on this page with product type, quantity, and specifications. Our sales engineer will send you a detailed quotation within 24 hours.

Absolutely. Our engineers provide material selection guidance, structural optimization, and technical support for your specific applications.

All products undergo strict inspection procedures, including dimensional accuracy, density, strength, and corrosion resistance tests before delivery.

Tell us your requirements

Our technical engineer will reply with a custom solution and quotation within one working day.

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Contact Information

Address

No. 88 Changshan Industrial Park, Zouping, Shandong, China

Email

info@zirsec.com

Whatsapp

+86 19311583352

Tel

+86 0731-74427743

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Silicon Carbide Tube

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